The present invention relates generally to semiconductor isolation methods and regions and relates more particularly to sidewall-sealed poly-buffered LOCOS isolation (SSPBL) regions and methods for forming same.
The conventional Local Oxidation of Silicon (LOCOS) method for forming semiconductor isolation regions has become a mainstay in the semiconductor technology due in part to the ease of its implementation in process flows. This oxidation method however leads to excessive lateral encroachment of the oxide into the desired active moat region. This encroachment is presently termed bird's beaking and is the cause of numerous and significant detriments to the semiconductor active region, thus leading to a reduction of the available active region. This is costly in terms of device yield and reliability.
Many isolation techniques have been developed for reducing the amount of encroachment associated with the standard LOCOS process. Examples of these are the Poly-Buffered LOCOS (PBL) method which utilizes a poly-silicon layer disposed between the pad silicon dioxide and silicon nitride layers of the conventional LOCOS process; the sidewall masked isolation (SWAMI) method which uses a silicon etch and sidewall silicon nitride layer to suppress teh field oxide bird's beak; the modified fully-framed-fully-recessed (MF3R) isolation method which uses an oxide undercut and backfill; and numerous modifications to these processes. However, the above solutions have either lead to a new set of problems, such as silicon pitting in the active moat regions, and crusting and scalloping along the moat edges, or have failed to correct the initial problem of excessive encroachment and corner loss. In addition, some of these isolation techniques are somewhat complicated and involve many process steps.
Thus a need exists in the technology for a semiconductor isolation process which corrects the above noted problems without degrading the performance or the useful area of the active region.